In recent years, silicon carbide (SiC) crystals have been adopted as semiconductor substrates for use in manufacturing semiconductor devices. SiC has a band gap larger than that of silicon (Si), which has been used more commonly. Hence, a semiconductor device employing SiC advantageously has a high breakdown voltage, low on resistance, and properties less likely to decrease in a high temperature environment.
Further, in order to manufacture silicon carbide semiconductor devices efficiently, silicon carbide semiconductor substrates have begun to be provided with a larger diameter. However, when a silicon carbide semiconductor substrate is provided with an outer diameter of, for example, about 6 inches, the silicon carbide semiconductor substrate becomes less flat.
Japanese Patent Laying-Open No. 2012-214376 describes a SiC wafer having a diameter of at least about 75 millimeters (3 inches), a distortion of less than about 5 μm, a warpage of less than about 5 mm, and a TTV of less than about 2.0 μm. Specifically, it is described that a SiC boule is sliced thinly into a form of wafer, and the thinly sliced wafer is placed on a double-sided lapper to start a lapping process using downward force smaller than downward force necessary to bend the wafer, thereby producing a wafer having low distortion, warpage, and TTV.